Conventional semiconductor masking processes involve microfabrication, that is, the definition of very small patterns of protective material, such as silicon dioxide, on a semiconductor surface. A dopant is introduced into the semiconductor body in the unprotected areas by diffusion, ion implantation or growth. Alternately, a layer of contrasting material, typically a metallizing ohmic contact layer, is formed on the unprotected areas by evaporation, or sputtering, or the like.
The mask for the masking process normally comprises a layer of photosensitive resist material formed on the surface of a protective SiO.sub.2 layer on a substrate. Typical photo-resist materials comprise organic materials which undergo chemical changes, such as molecular cross-linking, when subjected to UV radiation. The photo-resist layer is illuminated with ultraviolet light passed through a photo mask containing the desired pattern to be formed in the photo-resist layer. The photo-resist layer is developed to expose selected portions on the SiO.sub.2 layer and the exposed portions are dissolved by acid solutions. Next, the remaining resist material is stripped away and a dopant is introduced to the semiconductor through the unprotected portions of the pattern.
The foregoing process is subject to a number of deficiencies, especially when attempting to use this process for submicrometer patterning of thin films where extremely high resolution is required. Some of the problems associated with such conventional masking systems are the following:
The organic photoresist materials are not inert to acids nor resistant to plasma treatments creating difficulties in maintaining the integrity of the mask pattern. Generally, the organic resist material will not survive temperatures above 200.degree. C., which may occur in subsequent processing of the semiconductor wafer. Such resists also contain carbon and require organic solvents which may cause contamination unless extreme precaution is used.
Organic light sensitive resists must usually be formed in layer thicknesses of about 1 micron for satisfactory operation. The resolution of a mask is inversely proportional to mask thickness. The thinner the mask, the better the resolution. To achieve better resolution, thin X-ray sensitive masks of organic material have been utilized, but these masks require relatively long exposure time.
Organic resist materials are spun onto the surface, thus requiring the introduction of spinning equipment into the process with attendant problems of contamination.
It would therefore be highly desirable to have a resist material which is more compatible with current semiconductor processing techniques, such as Chemical Vapor Deposition (CVD). Such a resist should be capable of being formed by vacuum coating in very thin layers (approximately 1000 A), and which do not employ organic materials and which are capable of maintaining integrity at temperatures in excess of 200.degree. C.
Janus in U.S. Pat. No. 3,873,341, issued Mar. 25, 1975, proposes an alternate non-organic masking technique in which a layer of amorphous iron oxide is formed directly on the semiconductor substrate surface. The amorphous iron oxide layer is selectively heated by a thermal energy source, to crystallize certain portions of the iron oxide layer and form a selected pattern of crystalline iron oxide against a background of amorphous iron oxide.
The amorphous iron oxide is more sensitive to an acid wash than the crystalline iron oxide and can, therefore, be removed by the acid wash while leaving the crystalline iron oxide as a pattern mask. After the crystalline iron oxide is used as a mask for deposition or coating of the unprotected semiconductor surface, the pattern mask is removed by lapping the top surface.
The Janus thermal process contains distinct advantages over the prior art photo-resist techniques; chiefly, the attendant simplicity in eliminating the SiO.sub.2 coating. However, there are still substantial shortcomings in the Janus process attendant to the use of amorphous iron oxide as the resist material and the necessity for crystallizing such material. The transformation of amorphous iron oxide to crystalline iron oxide requires the use of thin layers of less than 1500 A of amorphous iron oxide and the application of at least 100 joules/cm.sup.2, to obtain the requisite temperature of 820.degree. C. to achieve crystallization within 10 milliseconds. Such limitations of relatively high exposure dose and time and relatively high temperatures greatly decrease the practical applicability of the Janus technique for high resolution submicrometer patterning. Accordingly, a need exists for a simple thermal resist process which does not require as high a process temperature and exposure time as in the Janus process.